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Related parts for SPCA718A Part Number Description Manufacturer Datasheet Request Spc-03-elr-xxcdfm Source Photonics, Inc. • (10 pages) Surface Mount 2-way Splitter Spc-1001-25 RF Micro Devices • (1 page) Surface Mount 2-way Splitter Spc-1601-25 RF Micro Devices • (1 page) Surface Mount 2-way Splitter Spc-2001-25 RF Micro Devices • (1 page) Surface Mount 2-way Splitter Spc-2201-25 RF Micro Devices • (1 page) Surface Mount 2-way Splitter Spc-2601-25 RF Micro Devices • (1 page) SMD Power Inductors Micro Electronics • (1 page) Taipei Multipower Electronics • (44 pages) SMD POWER INDUCTORS Micro Electronics • (1 page) SMD POWER INDUCTORS Micro Electronics • (1 page) TQFP Sunplus Technology Co., Ltd. • Sunplus Technology Co., Ltd. • Sunplus Technology Co., Ltd.

Aug 11, 2009. [demo+vfd+tool.rar] - System will automatically delete the directory of debug and release, so please do not put files on these two directory. [STK023rev090812_windows.7z.rar] - STK 0.2.3 (rev 090812) sunplus Tool Kit for Logo IR VFD and RomLoader [spre_0.14_ALPHA(2).rar] - tool.

• Sunplus Technology Co., Ltd. • Sunplus Technology Co., Ltd. • SPCA718A Summary of contents. Contact SUNPLUS TECHNOLOGY CO.

To obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. For any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. RCHITECTURE OR AME ND DUCATION........ 5 YSTEM ND UDIO LOCKS UPPORT IGH ESOLUTION TILL ICTURE.......... SPCA718A P D....

5 ROGRAM EVELOPMENT D..... 5 ECODING Preliminary Version: 0 PAGE MAR. ELECTRICAL SPECIFICATIONS..........22 6...........22 PERATING ONDITIONS 7.

PACKAGE/PAD LOCATIONS..........23 7. ACKAGE UTLINE IMENSIONS 8. DISCLAIMER............24 9.

REVISION HISTORY...........25 www.DataSheet4U.com © Sunplus Technology Co., Ltd. Proprietary & Confidential.......... SPCA718A MAR. 11, 2002 Preliminary Version: 0.1. The SPCA718A also includes a flexible programmable interface and allows the application engineer to further expand SVCD functionality.

With this interface, the system developer can greatly expand SVCD system capability. The SPCA718A is designed to connect to standard TV encoder, audio DAC(s), and CD-DSP without glue logic. ZoomPro: Programmable video Zoom-in/out 5.) ImagePro: Programmable digital image processing 2.12. Component Features 1.) Supply voltage: 2.5 volts (kernel), 3.3 volts (I/O) 2.) I/O interface: 5 volts tolerance 3.) Package: 128/160-pin QFP at 352x240x30 fps SPCA718A MAR. 11, 2002 Preliminary Version: 0.1. Proprietary & Confidential audio decoder 32bit RISC processor Audio output processor IO processor CD/host input buffer STC Timers MPEG2 video decoder On-screen- DMA display manager module Figure 3-1 SPCA718A Block Diagram SPCA718A ROM/flash/ SRAM controller GPIO controller UART EPP OGT. DD4 120 DD5 121 DD6 122 DD7 123 124 DD15 125 DD14 126 DD13 GPIOA7 127 128 GND www.DataSheet4U.com © Sunplus Technology Co., Ltd.

Proprietary & Confidential SPCA718 Figure 4-1 SPCA718A Pin Map. BIST_MODE_B CLKI PLL_RESISTOR CLKIO SDRAM_CLK RESET_B IR_IN VFD_CLK SPCA718A VFD_STB (128 pin) VFD_DATA AU_XCK ROM_DATA[7:0] AU_BCK GPIOA0(ROM_ADDR21) AU_LRCK AU_DATA GPIOG1(VSYNC_IN) GPIOG0(HSYNC_IN) DATA_TV[7:0] Figure 4-2 SPCA718A Signal Group Map SPCA718A RAS0_B RAS1_B WE_B BA0 DRAM Interface BA1. ADC Interface Direction O Reference voltage for ADC I Negative input of ADC O Microphone amplifier output PLL Interface Direction I External resistor for PLL circuit SPCA718A Description Description Description Description Description MAR. 11, 2002 Preliminary Version: 0. Radio shack pro 62 owners manual software.

RAS1_B BA1 GPIO_SEL[2] 1’b0 1’b1 DQM0 GPIO_SEL[3] 1’b0 1’b1 DQM1 GPIO_SEL[2] 1’b0 1’b1 BA0 SPCA718A Description Description Description 1 CK_SEL = 2’b11 TEST_MODE = 2’b11 2’b01 81 MHz 2’b01 BIST Test BIST_MODE 2’b11 NC ADC_S[0](I) BIST_MODE ADC_S[1](I) BIST_MODE ADC_S[2](I) BIST_MODE ADC_PWAD(I) Preliminary Version: 0.1. NC GPIO_SEL[14] 1’b0 1’b1 GPIOA[15] GPIO_SEL[15] 1’b0 1’b1 GPIOA[16] GPIOA[17] GPIO_SEL_AUX[0] 1’b0 1’b1 UA_TXD UA_RXD GPIO_SEL_AUX[1] 1’b0 1’b1 UA_RTS_B UA_CTS_B SPCA718A BIST_MODE 2’b11 DA[9] ADC_MCLK(I) DA[10] ADC_FS(I) DA[11] ADC_SPGA(I) BIST_MODE NC BIST_MODE BIST_FAIL BIST_MODE NC BIST_MODE ADC_D[0](O) BIST_MODE ADC_D[1](O) BIST_MODE 2’b11 NC ADC_D[2](O) BIST_MODE ADC_D[3](O) BIST_MODE. GPIO_SEL_AUX[4] 1’b1 DATA_TV7 DATA_TV6 DATA_TV5 DATA_TV4 DATA_TV3 DATA_TV2 DATA_TV1 DATA_TV0 GPIO_SEL_AUX[5] 1’b0 GPIOA[38] GPIO_SEL_AUX[6] 1’b0 GPIOA[39] GPIO_SEL_AUX[11:10] 2’b01 GPIOA[14] Select SPCA718A BIST_MODE ADC_D[12](O) ADC_D[13](O) ADC_D[14](O) SPT_IN(I) BIST_MODE NC NC BIST_MODE SPT_OA(O) SPT_OB(O) SPT_OC(O) SPT_OSC( 1’b1 CLK27_OUT 1’b1 PAL_NTSC 2’b10 GPIOA[13] 1’. A decoding system, including all of the synchronized decoders and the source of the coded data, must have exactly one independent time master.